Simplify any Boolean expression, generate complete truth tables, and obtain the minimal Sum‑of‑Products (SOP) form using exact Quine‑McCluskey minimization. Supports variables A, B, C, D and operators: & (AND), | (OR), ! (NOT) ∧ ∨ ¬ → ↔ ⊕ | Also accepts & | ! | Variables: A-Z (max 4 for K-map), parentheses.
Uses Quine-McCluskey algorithm to generate minimal Sum-of-Products (SOP) from truth table minterms. Supports implication (→), equivalence (↔), XOR (⊕) by rewriting to ∧,∨,¬. No eval() used: expression is parsed recursively and evaluated safely. Also accepts ASCII operators: & for ∧, | for ∨, ! for ¬.
Boolean algebra is the backbone of digital logic design, computer architecture, and formal verification. Developed by George Boole in the 19th century and later refined by Claude Shannon, it enables the analysis and simplification of logic circuits. Our calculator reduces complex expressions to minimal Sum‑of‑Products (SOP) form using exact prime implicant selection (Quine‑McCluskey with optimal covering), equivalent to Karnaugh maps for up to 4 variables.
? Key Laws: Identity, Idempotent, Complement, De Morgan’s, Distributive, Absorption ?
Minimizing logic expressions reduces the number of logic gates (AND/OR/NOT) in digital circuits, lowering power consumption, cost, and propagation delay. From CPU design to FPGA programming, Boolean minimization is essential. Our calculator uses exact prime implicant extraction and optimal set cover to guarantee the most compact representation, avoiding redundant terms.
The tool parses your expression, builds a truth table for all variable combinations, extracts minterms where output = 1, then computes all prime implicants using iterative merging. Finally, an exact minimum cover (exhaustive search) selects the simplest SOP expression. The result matches what you would obtain from a 4‑variable Karnaugh map, but extended algorithmically and verified for optimality.
Engineers use Boolean simplification to drive 7‑segment displays. For a BCD to 7‑segment decoder, each segment’s logic is reduced from canonical forms to minimal gates. For example, segment ‘a’ expression !A & !C | B & C | A & !B & !C | A & B & C simplifies dramatically. Using our calculator, you can experiment with such expressions and witness the power of minimization.
| Operator | Symbol | Example | Precedence |
|---|---|---|---|
| NOT (Complement) | ! | !A | Highest (applied to immediate variable) |
| AND | & | A & B | Medium |
| OR | | | A | B | Lowest |
| Parentheses | ( ) | (A & B) | C | Override precedence |
A·B + !A·C. Every Boolean expression can be represented in SOP, and minimal SOP uses the fewest literals and terms, which is ideal for AND‑OR logic circuits.